LM412 Sample and Hold

This is a LM412 sample and hold circuit. This circuit uses discrete components. This circuit also uses MPF102 JFET transistor and LM412 dual op-amps. The source is prevented to charge the capacitor by the MPF102. The LM412 is used because this op-amp has zero input bias current. This circuit has two mode, hold mode and sample mode. When this circuit is used as HOLD, the wire must be connected manually to -12V and when used as SAMPLE, just leave disconnect. This circuit also uses a diode that is used to “catch” the output if the feedback loop is broken and the JFET turns OFF. To prevent this action from the output feedback loop, the 33K resistor is used. The JFET will not turn off and the op-amp saturates at the supply rail, if the diode is removed. Here is the circuit:

This circuit has rate of 0.77mV/s or droop of 0.23V in 5 minutes. The leakage of this circuit is about 77pA. The leakage of this circuit is depend on the capacitor. Since the capacitor has transient behavioral and electrolytic leakage. The best capacitor of this circuit are polypropylene, Mylar or polystyrene. Another problem of this circuit is dielectric hysteresis. The voltage changes on charge and discharge are not the same.

Beside that, the dielectric absorption is also the problem of this circuit. Dielectric absorption is condition where there is past state “memory”. It is caused by the capacitor that get small voltage as time goes by when the capacitor freshly discharged. These problems is caused by dielectric behavior and structure.